Fintronic Super FinSim v10.0.03 LINUX 英文正式版(FinSim Verilog 仿真軟體)
破解說明:
2) Install, when asked about dongle-type, choose "No Dongle"!
3) Copy our supplied license.dat to a permanent place,
set the system-wide env. variable LM_LICENSE_FILE
with full path+license-filename.
4) Enjoy!
內容說明:
Super-FinSim是頂級的線性FinSim Verilog仿真器，從1993年放出第一款
FinSim Verilog仿真器至今，FinSim Verilog已經引入了許多嶄新的功能：
混合編譯和解釋型仿真，仿真工廠可以讓工程師管理數以百計的同步仿真、
分離和增量編譯、高性能保存和重啟、直接集成C代碼，無須PLI。
英文說明:
Super-FinSim is the top of the line FinSim Verilog
simulator. Ever since the first FinSim Verilog simulator has
been sold in 1993, the FinSim Verilog simulators have
introduced many new features that have become state of the
art in Verilog simulation: mixed Compiled and Interpreted
simulation, simulation Farm that allows one
Engineer to
manage hundreds of simultaneous simulations, separate and
incremental compilation, high performance save and restart,
direct integration with C code without the need for PLI,
etc.
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